This Government Contract opportunity was posted on August 22, 2013. The submission period has ended. Browse the details below for market research, or find similar active opportunities.

Top

Curtiss Wright

Awarded

FA8224-13-R-0090Federal

Submission Closed08/21/2013, 12:00:00 PM UTC

Contract Overview

Solicitation details, issuing organization, response deadlines, documents, and interested companies for this government contract opportunity.

Active Opportunities Like This One

NAICS: 334418

New

SLED

LED Digital Display Supply and IntegrationThis subcontract agreement involves the supply and integration of a high-resolution four-color LED display system for the City of Augusta Recreation and Parks Department. The selected contractor is responsible for furnishing and configuring a Daktronics GT6X or equivalent 10mm display with a 108 by 324 matrix. The scope of work includes the full installation of the hardware, the setup of cellular communication for connectivity, and the provision of webinar training to ensure City staff can operate the system effectively. To qualify for this project, the contractor must hold the necessary manufacturer certification to ensure professional installation and system integrity. The final deliverable is a fully operational LED display with active cellular connectivity. Interested parties must submit their responses by December 1, 2026, at 4:00 PM.

POSTED

DEADLINE

Solicitation # SPE4A6-27-T-5978

Solicitation SPE4A6-27-T-5978 is for the procurement of 14 solenoid assemblies, identified by NSN 5945-00-948-1481 and Honeywell Aerospace part number 311473-4. This is not a small business set-aside and falls under NAICS code 334418. The contract is issued by the DLA Weapons Support ASC Commodities Division with a required delivery date of December 5, 2027, and a need ship date of April 20, 2027. Delivery is specified as FOB Origin, with destination inspection and acceptance required. The procurement is part of the First Destination Transportation program to utilize Government-Arranged Transportation. The contractor must adhere to strict quality and technical standards, including sampling methods per MIL-STD-1916 or ASQ H1331, and component lead finish marking according to IPC/JEDEC J-STD-609. The item is designated as a critical application item, and the intentional addition of mercury or mercury-containing compounds is prohibited. Packaging must comply with MIL-STD-2073-1E and RP001 DLA requirements. Administrative requirements include electronic invoicing via Wide Area WorkFlow and compliance with various FAR and DFARS clauses regarding cybersecurity, domestic sourcing under the Buy American Act and Berry Amendment, and the safeguarding of covered defense information. Evaluation may prioritize offers with expedited delivery schedules, and additive manufacturing is prohibited unless specifically authorized.

DLA WEAPONS SUPPORT ASC COMMODITIES DIVISION

POSTED

DEADLINE

Engineering White Bond Paper SupplierThis subcontract agreement establishes a partnership for the supply and delivery of Engineering White Bond paper rolls to support prime contractors under Alabama Department of Transportation supply contracts. The scope of work requires the provision of 105 rolls of 34 by 650 inch paper and 700 rolls of 17 by 650 inch paper, all featuring 3-inch cores, to be delivered to designated state locations. The contract is managed by the Alabama Department of Transportation G24 Office Engineer and falls under NAICS code 334418. A critical compliance requirement for the supplier is adherence to the Beason-Hammon Alabama Taxpayer and Citizen Protection Act, which mandates the use of E-Verify.

Alabama Department of Transportation, G24 Office Engineer - Proposal Engineer

POSTED

DEADLINE

Avionics Circuit Card Assembly (CCA) Repair ServicesThe Avionics Circuit Card Assembly (CCA) Repair Services subcontract involves providing specialized component-level diagnostics, soldering, and repair for complex circuit cards supporting Air Force Sustainment Center avionics projects. The scope of work specifically includes the testing and repair of MUX CCAs, Power Supply CCAs, and CDEEU Mother Boards to ensure the delivery of fully functional repaired assemblies. Operating under NAICS code 334418 for the Department of Defense, the contractor must maintain strict compliance with ANSI/ESD-S20.20-2021 standards. Additionally, the project requires adherence to CMMC Level 2 and DFARS 252.204-7012 regulations to ensure the secure handling of Controlled Unclassified Information.

POSTED

DEADLINE

Manufacture and Supply of Switch Connect Assemblies (NIIN 016527657)This subcontract involves the manufacture and supply of Switch Connect Assemblies, identified by NIIN 016527657, for prime contractors supporting Navsup Weapon Systems Support Mech projects under the Department of Defense. The contractor is responsible for fabricating these assemblies in strict accordance with TDP Version 003 and IRPOD drawings, ensuring that electrostatic protection is maintained per ASTM D3951-18 standards. Compliance requirements for this contract include adherence to the Buy American Act and DFARS cybersecurity safeguarding protocols. All finished assemblies must be delivered with a Certificate of Compliance as specified by DI-MISC-81356. The opportunity falls under NAICS code 334418, with a response deadline set for November 27, 2026.

Navsup Weapon Systems Support Mech

POSTED

DEADLINE

59--CIRCUIT CARD ASSEMB, IN REPAIR/MODIFICATION OF

Solicitation # N0010427QDA10

This presolicitation notice, issued by the Navsup Weapon Systems Support Mech, seeks the procurement of 30 circuit card assemblies under NSN 7H-5998-013864016. The items are to be delivered to DLA Distribution New Cumberland, Pennsylvania. Due to the specialized engineering skills, unique design capabilities, and proprietary technical data required to maintain part quality, the government intends to solicit and negotiate with a single source under FAR 6.302-1. Any alternate source must undergo a rigorous qualification process approved by the cognizant Government engineering activity. The acquisition is designated as a total Small Business Set Aside. While the government is not currently utilizing FAR Part 12 for commercial items, interested parties may submit capability statements or identify their interest within 15 days of the notice. Technical specifications and standards are available through the DoD Single Stock Point or the ASSIST-Online portal. The response deadline for this action is November 30, 2026.

Navsup Weapon Systems Support Mech

POSTED

DEADLINE

Precision Manufacture of Motional TransducersThis subcontract involves the precision manufacture of six motional transducers under NSN 6695-01-093-7842 for the Department of the Navy's NAVSUP Weapon Systems Support. The selected contractor is responsible for fabricating the units in strict accordance with Technical Data Package Version 006, utilizing specialized precision machining and assembly equipment to ensure all quality assurance and inspection standards are met. The contractor must adhere to Buy American clauses and provide Material Safety Data Sheets that comply with OSHA and FED STD 313 regulations. Performance of the contract will take place in Mechanicsburg, Pennsylvania, with a response deadline set for November 30, 2026.

Navsup Weapon Systems Support Mech

POSTED

DEADLINE

Manufacture of Universal BOB CardThis subcontract, managed by the Department of the Navy under the SPRMM1 DLA Mechanicsburg agency, involves the manufacture and delivery of one Universal BOB Card (NIIN: 016703162) for prime contractors on DLA supply contracts. The fabrication process must strictly adhere to Cage Code 0RJ73 and reference SE-01030-1, utilizing specialized PCB fabrication and assembly equipment to ensure an exact product. Additionally, the contractor is required to perform physical identification and marking in accordance with MIL-STD-130, REV N. The opportunity is designated as an SBA set-aside under NAICS code 334418, with the place of performance located in Mechanicsburg, Pennsylvania. The solicitation was posted on October 30, 2026, and requires a response by November 16, 2026. The final deliverable consists of one completed, physically marked, and fully documented Universal BOB Card.

SPRMM1 DLA Mechanicsburg

POSTED

DEADLINE

Bare PCB FabricationThis subcontract involves the fabrication of raw, unpopulated printed circuit boards for prime contractors supporting DLA and Navy electronic component projects. The scope of work includes chemical etching, drilling, plating, and solder mask application, specifically adhering to the technical data package Version 003 and design specifications for Reference Number 8383870-1. The contractor is required to use high-grade laminates and specialized PCB fabrication machinery to deliver bare circuit boards. Managed by the Department of the Navy through SPRMM1 DLA Mechanicsburg, the project falls under NAICS code 334418. The place of performance is located in Mechanicsburg, Pennsylvania. The solicitation was posted on October 30, 2026, with a response deadline set for November 20, 2026.

SPRMM1 DLA Mechanicsburg

POSTED

DEADLINE

Display Unit Component SupplyThis subcontract involves the supply of OEM or approved equivalent electronic components, screens, and circuitry to support prime contractors for the Department of the Navy's Navsup Weapon Systems Support Mechanicsburg. The primary objective is to source sub-assemblies necessary for restoring Display Unit NIIN 015690680 to A condition stock, with all certified replacement parts delivered directly to the designated repair facility in Mechanicsburg. The contract requires strict adherence to Buy American-Free Trade Agreements and MIL-STD-130 standards for unique identification. Operating under NAICS code 334418, the project ensures that all supplied components meet rigorous military specifications to maintain the operational integrity of the naval display units.

Navsup Weapon Systems Support Mech

POSTED

DEADLINE

Supply of Circuit Card Assembly (NSN 5998-01-501-6736)This subcontract, issued by the Department of the Navy via the Pa DLA Aviation At Philadelphia, requires the manufacture or sourcing of two specialized Circuit Card Assemblies identified as NSN 5998-01-501-6736. The selected provider must possess PCB fabrication capabilities and ensure strict adherence to DFARS 252.225-7020 trade compliance. All hardware must be preserved, packed, and marked in accordance with MIL-STD-2073, MIL-STD-2073-1, and MIL-STD-129 standards. The project falls under NAICS code 334418, with the place of performance located in Philadelphia, Pennsylvania. Responses are due by November 16, 2026.

Pa DLA Aviation At Philadelphia

POSTED

DEADLINE

CIRCUIT CARD ASSEMB — 5998015016736 — SPRPA127QXA68

Solicitation # SPRPA127QXA68

Solicitation SPRPA1-27-Q-XA68, issued by DLA Aviation at Philadelphia for the Department of the Navy on October 30, 2026, seeks quotations for the procurement of two Circuit Card Assemblies (NSN 5998-01-501-6736). The requirement is split into two line items, 0001AA and 0001AB, each for one unit to be delivered FOB Destination. Quotations are due by November 16, 2026. The government intends to make a single award to a technically acceptable offeror based on the most advantageous combination of price and past performance, with past performance weighted as more important than price. Evaluation will utilize the Supplier Performance Risk System to assess item, price, and supplier risk. The contractor must adhere to strict quality and logistics standards, including ISO 9001 certification and MIL-STD-129 for marking and labeling. Packaging must comply with MIL-STD-2073-1 for stock and overseas shipments, or ASTM D3951-18 for domestic commercial packaging, with specific requirements for electrostatic discharge protection per ANSI/ESD S20.20-2021. Key regulatory requirements include compliance with the Buy American and Balance of Payments Program, safeguarding covered defense information under DFARS 252.204-7012, and the electronic submission of payment requests via Wide Area WorkFlow. Inspection and acceptance will occur at the point of origin.

Pa DLA Aviation At Philadelphia

POSTED

1 day ago

DEADLINE

in 16 days

General Info

Agency

N/A

Contract Value

$547,361

NAICS

334418 - Printed Circuit Assembly (Electronic Assembly) Manufacturing

Place of Performance

Hill Air Force Base, UT, 84056, USA

Set-Aside

NONE

Awardee

DY 4 SYSTEMS INC

Award Issued Date

08/21/2013, 12:00:00 AM UTC

Documents

No documents available

Documents will appear here when they are available.

AI Contract Breakdown

Uniform Contract Format

No documents to break down

The breakdown needs solicitation documents. None were found from this contract's source.

Timeline

1 update

PhaseAwarded

PostedAug 1

Combined Synopsis

Notice updatedAug 6

The notice description changed.

AwardedAug 21

Contract was awarded

Submission Closed

08/21/2013, 12:00:00 PM UTC

Find active opportunities like this

Get full access to discover similar active contracts, track opportunities, and build proposals with AI assistance.

Organization & Contact Information

AgencyN/A

Contacts1 person available

OfficeN/A

Organization / Agency

N/A

Office AddressN/A

Contacts

Dayna Parkin-Urquhart

contact@example.gov

+1 (555) 000-0000

Full Description

Other Than Full and Open Competition. The Air Force plans to procure CLIN: 0001 three each VME-1908-0180 : 6U VME Single Board Computer. VME64x Bus support w/standard P0 Connector. Ruggedization: Air-Cooled Level 0 CPU: Intel Core i7 (4th Gen Quad Core) System Memory: 8Gbytes of 1066 MHz DDR3 SDRAM with ECC System Flash: 8Gbytes of non-volatile NAND flash. Software Load: Fedora Linux Front via breakout cable; (2) EIA-232 ports, (1) Gigabit Ethernet port, (1) USB 2.0 port, (1) DVI, and (1) Reset button. P2 Connector: (2) EIA-232 ports, (2) EIA-422 ports, (1) AC97 Audio port, (8) GPIO, (1) VGA (1) DVI P0 Connector: (2) Gigabit Ethernet ports, (1) SATA 3.0 port, (2) USB 2.0 Ports X/PMC Sites: (2) 64 bit/133 MHz PMC sites -or- (2) 8xPCIe XMC sites orcombinations of PMC and XMC. EUS Code No License Required (NO SUBSTITUTIONS ALLOWED). CLIN: 0002 six each RTM-1905-0003 : Rear Transition Module for the SVME/DMV-1905. I/O mode 3 and 4 - and SVME-1908 Mode 0 This transition mode - contains connectors providing access to: On the card edge panel : 2 x Gigabit Ethernet, 2 x RS232, 1 x SATA, 2 x USB, Reset button, and 2 x DVI/RGB. Additional connectors not on card edge: 2 x RS422 Jumper Headers are provided for access to: 2 x 64 X/PMC I/O, Audio, 8 DIO, and write protects EUS Code No License Required (NO SUBSTITUTIONS ALLOWED). CLIN: 0003 three CBL-1905-0003 : Breakout cable for SVME-1905/1908 and VPX6-1957-Axx Front Panel I/O. This cable connects to the high-density connector on the SVME-1905 and VPX6-1956-Axx front panel. Provides separate branches: 2 x RS232 ports on DE-9, 1 x GigE port on RJ45 jack, 1 x USB on USB plug, 1 x push button reset switch, and 1 x DVI-D connector. EUS Code No License Required (NO SUBSTITUTIONS ALLOWED). CLIN: 0004 two each XF05D-S17 : Digital I/O XMC Module, fitted with a Xilinx Virtex 5 XC5VSX95T-2I user programmable FPGA with 132 front panel digital I/O signals, two banks of 128 Mbytes (64Mx16) DDR2 SDRAM, two banks of 9Mbytes (4Mx18) QDR2 SRAM. Fitted with optional XMC format P15 connector for PCIe. PMC P14 digital I/O. Air-cooled level 0. (NO SUBSTITUTIONS ALLOWED). CLIN: 0005 one each XF05D-XFL : Software and HDL Code development tools for CWCEC XMC FPGA05D PMC/XMC digital I/O modules. Support for Linux operating system that includes: VHDL library code blocks (demonstrating how board resources can be used), Linux drivers, API with C support libraries. (NO SUBSTITUTIONS ALLOWED). CLIN: 0006 one each PF05-XFL : Software and HDL Code development tools for CWCEC PMC-FPGA05 PMC modules. Support for Linux operating system that includes: VHDL library code blocks (demonstrating how board resources can be used), Linux drivers, API with C support libraries, Example code, FLASH programming and board debug utilities. (NO SUBSTITUTIONS ALLOWED). CLIN: 0007 one each DSW-1908-6150-FED6 : CWCEC Fedora 64 bit BSP for the SVME/DMV-1908SBC. Product(s) Supported: SVME/DMV-1908-xxxx Includes: FED X86 64 INSTALLER FED X86 64 DRVS N/S On 3 CD/DVDs (NO SUBSTITUTIONS ALLOWED). CLIN: 0008 three each SVME-1908-0180 : 6U VME Single Board Computer. VME64x Bus support w/standard P0 Connector. Ruggedization: Air-Cooled Level 0 CPU: Intel Core i7 (4th Gen Quad Core) System Memory: 8Gbytes of 1066 MHz DDR3 SDRAM with ECC System Flash: 8Gbytes of non-volatile NAND flash. Software Load: Fedora Linux Front via breakout cable; (2) EIA-232 ports, (1) Gigabit Ethernet port, (1) USB 2.0 port, (1) DVI, and (1) Reset button. P2 Connector: (2) EIA-232 ports, (2) EIA-422 ports, (1) AC97 Audio port, (8) GPIO, (1) VGA (1) DVI P0 Connector: (2) Gigabit Ethernet ports, (1) SATA 3.0 port, (2) USB 2.0 Ports X/PMC Sites: (2) 64 bit/133 MHz PMC sites -or- (2) 8xPCIe XMC sites -orcombinations of PMC and XMC. EUS Code No License Required (NO SUBSTITUTIONS ALLOWED). CLIN: 0009 six each CBL-1905-0003 : Breakout cable for SVME-1905/1908 and VPX6-1957-Axx Front Panel I/O. This cable connects to the high-density connector on the SVME-1905 and VPX6-1956-Axx front panel. Provides separate branches: 2 x RS232 ports on DE-9, 1 x GigE port on RJ45 jack, 1 x USB on USB plug, 1 x push button reset switch, and 1 x DVI-D connector. EUS Code No License Required (NO SUBSTITUTIONS ALLOWED). CLIN: 0010 one each XF05D-S17 : Digital I/O XMC Module, fitted with a Xilinx Virtex 5 XC5VSX95T-2I user programmable FPGA with 132 front panel digital I/O signals, two banks of 128 Mbytes (64Mx16) DDR2 SDRAM, two banks of 9Mbytes (4Mx18) QDR2 SRAM. Fitted with optional XMC format P15 connector for PCIe. PMC P14 digital I/O. Air-cooled level 0. (NO SUBSTITUTIONS ALLOWED). CLIN: 0011 five each SVME-1905-0183 6U VME SIngle Board COmputer. VME64x Bus support w/standard P0 Connector. Ruggedization: Air-Cooled Level 0 CPU: 2.53 GHz Intel Core i7 with 4 Mbytes of internal L3 cache (2 cores). System Memory: 8Gbytes of 1066 MHz DDR3 SDRAM with ECC System Flash: 8Gbytes of non-volatile NAND flash. Software Load: Winder River Linux 3.0programmed into on-board NAND Flash. Front via breakout cable; (2) EIA-232 ports, (1) Gigabit Ethernet port, (1) USB 2.0 port, (1) DVI, and (1) Reset button. P2 Connector: (2) EIA-232 ports, (2) EIA-422 ports, (1) AC97 Audio port, (8) GPIO, (1) VGA (1) DVI P0 COnnector: (2) Gigabit Ethernet ports, (1) SATA 3.0 port, (2) USB 2.0 Ports X/PMC Sites: (2) 64 bit/133 MHz PMC sites -or- (2) 8xPCle XMC sites -or- combinations of PMC and XMC. (NO SUBSTITUTIONS ALLOWED). CLIN: 0012 four each XF05D-S17 : Digital I/O XMC Module, fitted with a Xilinx Virtex 5 XC5VSX95T-2I user programmable FPGA with 132 front panel digital I/O signals, two banks of 128 Mbytes (64Mx16) DDR2 SDRAM, two banks of 9Mbytes (4Mx18) QDR2 SRAM. Fitted with optional XMC format P15 connector for PCIe. PMC P14 digital I/O. Air-cooled level 0. (NO SUBSTITUTIONS ALLOWED). CLIN: 0013 one each XF05D-XFV : Software and HDL Code development tools for CWCEC XMC-FPGA05D PMC/XMC digital I/O modules. Support for VxWorks operating system that includes: VHDL library code blocks (demonstrating how board resources can be used), VxWorks drivers, API with C support libraries. EUS Code No License Required. (NO SUBSTITUTIONS ALLOWED). CLIN: 0014 two each RTM-1905-0003 : Rear Transition Module for the SVME/DMV-1905. I/O mode 3 and 4 - and SVME-1908 Mode 0 This transition mode - contains connectors providing access to: On the card edge panel : 2 x Gigabit Ethernet, 2 x RS232, 1 x SATA, 2 x USB, Reset button, and 2 x DVI/RGB. Additional connectors not on card edge: 2 x RS422 Jumper Headers are provided for access to: 2 x 64 X/PMC I/O, Audio, 8 DIO, and write protects EUS Code No License Required (NO SUBSTITUTIONS ALLOWED). CLIN: 0015 two each SVME-1908-0180 : 6U VME Single Board Computer. VME64x Bus support w/standard P0 Connector. Ruggedization: Air-Cooled Level 0 CPU: Intel Core i7 (4th Gen Quad Core) System Memory: 8Gbytes of 1066 MHz DDR3 SDRAM with ECC System Flash: 8Gbytes of non-volatile NAND flash. Software Load: Fedora Linux Front via breakout cable; (2) EIA-232 ports, (1) Gigabit Ethernet port, (1) USB 2.0 port, (1) DVI, and (1) Reset button. P2 Connector: (2) EIA-232 ports, (2) EIA-422 ports, (1) AC97 Audio port, (8) GPIO, (1) VGA (1) DVI P0 Connector: (2) Gigabit Ethernet ports, (1) SATA 3.0 port, (2) USB 2.0 Ports X/PMC Sites: (2) 64 bit/133 MHz PMC sites -or- (2) 8xPCIe XMC sites -orcombinations of PMC and XMC. EUS Code No License Required (NO SUBSTITUTIONS ALLOWED). CLIN: 0016 two each XF05D-S17 : Digital I/O XMC Module, fitted with a Xilinx Virtex 5 XC5VSX95T-2I user programmable FPGA with 132 front panel digital I/O signals, two banks of 128 Mbytes (64Mx16) DDR2 SDRAM, two banks of 9Mbytes (4Mx18) QDR2 SRAM. Fitted with optional XMC format P15 connector for PCIe. PMC P14 digital I/O. Air-cooled level 0. (NO SUBSTITUTIONS ALLOWED). CLIN: 0017 four each SVME-1908-0180 : 6U VME Single Board Computer. VME64x Bus support w/standard P0 Connector. Ruggedization: Air-Cooled Level 0 CPU: Intel Core i7 (4th Gen Quad Core)System Memory: 8Gbytes of 1066 MHz DDR3 SDRAM with ECC System Flash: 8Gbytes of non-volatile NAND flash. Software Load: Fedora Linux Front via breakout cable; (2) EIA-232 ports, (1) Gigabit Ethernet port, (1) USB 2.0 port, (1) DVI, and (1) Reset button. P2 Connector: (2) EIA-232 ports, (2) EIA-422 ports, (1) AC97 Audio port, (8) GPIO, (1) VGA (1) DVI P0 Connector: (2) Gigabit Ethernet ports, (1) SATA 3.0 port, (2) USB 2.0 Ports X/PMC Sites: (2) 64 bit/133 MHz PMC sites -or- (2) 8xPCIe XMC sites -orcombinations of PMC and XMC. EUS Code No License Required (NO SUBSTITUTIONS ALLOWED). CLIN: 0018 nine each CBL-1905-0003 : Breakout cable for SVME-1905/1908 and VPX6-1957-Axx Front Panel I/O. This cable connects to the high-density connector on the SVME-1905 and VPX6-1956-Axx front panel. Provides separate branches: 2 x RS232 ports on DE-9, 1 x GigE port on RJ45 jack, 1 x USB on USB plug, 1 x push button reset switch, and 1 x DVI-D connector. EUS Code No License Required (NO SUBSTITUTIONS ALLOWED). CLIN: 0019 XF05D-S17 : Digital I/O XMC Module, fitted with a Xilinx Virtex 5 XC5VSX95T-2I user programmable FPGA with 132 front panel digital I/O signals, two banks of 128 Mbytes (64Mx16) DDR2 SDRAM, two banks of 9Mbytes (4Mx18) QDR2 SRAM. Fitted with optional XMC format P15 connector for PCIe. PMC P14 digital I/O. Air-cooled level 0.(NO SUBSTITUTIONS ALLOWED). CLIN: 0020 two each SVME-1908-0180 : 6U VME Single Board Computer. VME64x Bus support w/standard P0 Connector. Ruggedization: Air-Cooled Level 0 CPU: Intel Core i7 (4th Gen Quad Core) System Memory: 8Gbytes of 1066 MHz DDR3 SDRAM with ECC System Flash: 8Gbytes of non-volatile NAND flash. Software Load: Fedora Linux Front via breakout cable; (2) EIA-232 ports, (1) Gigabit Ethernet port, (1) USB 2.0 port, (1) DVI, and (1) Reset button. P2 Connector: (2) EIA-232 ports, (2) EIA-422 ports, (1) AC97 Audio port, (8) GPIO, (1) VGA (1) DVI P0 Connector: (2) Gigabit Ethernet ports, (1) SATA 3.0 port, (2) USB 2.0 Ports X/PMC Sites: (2) 64 bit/133 MHz PMC sites -or- (2) 8xPCIe XMC sites -orcombinations of PMC and XMC. EUS Code No License Required (NO SUBSTITUTIONS ALLOWED). CLIN: 0021 six each CBL-1905-0003 : Breakout cable for SVME-1905/1908 and VPX6-1957-Axx Front Panel I/O. This cable connects to the high-density connector on the SVME-1905 and VPX6-1956-Axx front panel. Provides separate branches: 2 x RS232 ports on DE-9, 1 x GigE port on RJ45 jack, 1 x USB on USB plug, 1 x push button reset switch, and 1 x DVI-D connector. EUS Code No License Required (NO SUBSTITUTIONS ALLOWED). CLIN: 0022 one each XF05D-S17 : Digital I/O XMC Module, fitted with a Xilinx Virtex 5 XC5VSX95T-2I user programmable FPGA with 132 front panel digital I/O signals, two banks of 128 Mbytes (64Mx16) DDR2 SDRAM, two banks of 9Mbytes (4Mx18) QDR2 SRAM. Fitted with optional XMC format P15 connector for PCIe. PMC P14 digital I/O. Air-cooled level 0. (NO SUBSTITUTIONS ALLOWED). CLIN: 0023 nine each SVME-1908-0180 : 6U VME Single Board Computer. VME64x Bus support w/standard P0 Connector. Ruggedization: Air-Cooled Level 0 CPU: Intel Core i7 (4th Gen Quad Core)System Memory: 8Gbytes of 1066 MHz DDR3 SDRAM with ECC System Flash: 8Gbytes of non-volatile NAND flash. Software Load: Fedora Linux Front via breakout cable; (2) EIA-232 ports, (1) Gigabit Ethernet port, (1) USB 2.0 port, (1) DVI, and (1) Reset button. P2 Connector: (2) EIA-232 ports, (2) EIA-422 ports, (1) AC97 Audio port, (8) GPIO, (1) VGA (1) DVI P0 Connector: (2) Gigabit Ethernet ports, (1) SATA 3.0 port, (2) USB 2.0 Ports X/PMC Sites: (2) 64 bit/133 MHz PMC sites -or- (2) 8xPCIe XMC sites -orcombinations of PMC and XMC. EUS Code No License Required (NO SUBSTITUTIONS ALLOWED). CLIN: 0024 seven each CBL-1905-0003 : Breakout cable for SVME-1905/1908 and VPX6-1957-Axx Front Panel I/O. This cable connects to the high-density connector on the SVME-1905 and VPX6-1956-Axx front panel. Provides separate branches: 2 x RS232 ports on DE-9, 1 x GigE port on RJ45 jack, 1 x USB on USB plug, 1 x push button reset switch, and 1 x DVI-D connector. EUS Code No License Required (NO SUBSTITUTIONS ALLOWED). CLIN: 0025 five each XF05D-S17 : Digital I/O XMC Module, fitted with a Xilinx Virtex 5 XC5VSX95T-2I user programmable FPGA with 132 front panel digital I/O signals, two banks of 128 Mbytes (64Mx16) DDR2 SDRAM, two banks of 9Mbytes (4Mx18) QDR2 SRAM. Fitted with optional XMC format P15 connector for PCIe. PMC P14 digital I/O. Air-cooled level 0. (NO SUBSTITUTIONS ALLOWED). CLIN 0026 eight each SVME-1908-0180 : 6U VME Single Board Computer. VME64x Bus support w/standard P0 Connector. Ruggedization: Air-Cooled Level 0 CPU: Intel Core i7 (4th Gen Quad Core)System Memory: 8Gbytes of 1066 MHz DDR3 SDRAM with ECC System Flash: 8Gbytes of non-volatile NAND flash. Software Load: Fedora Linux Front via breakout cable; (2) EIA-232 ports, (1) Gigabit Ethernet port, (1) USB 2.0 port, (1) DVI, and (1) Reset button. P2 Connector: (2) EIA-232 ports, (2) EIA-422 ports, (1) AC97 Audio port, (8) GPIO, (1) VGA (1) DVI P0 Connector: (2) Gigabit Ethernet ports, (1) SATA 3.0 port, (2) USB 2.0 Ports X/PMC Sites: (2) 64 bit/133 MHz PMC sites -or- (2) 8xPCIe XMC sites -orcombinations of PMC and XMC. EUS Code No License Required (NO SUBSTITUTIONS ALLOWED). CLIN: 0027 eight each CBL-1905-0003 : Breakout cable for SVME-1905/1908 and VPX6-1957-Axx Front Panel I/O. This cable connects to the high-density connector on the SVME-1905 and VPX6-1956-Axx front panel. Provides separate branches: 2 x RS232 ports on DE-9, 1 x GigE port on RJ45 jack, 1 x USB on USB plug, 1 x push button reset switch, and 1 x DVI-D connector. EUS Code No License Required (NO SUBSTITUTIONS ALLOWED). CLIN: 0028 three each SVME-1908-0180 : 6U VME Single Board Computer. VME64x Bus support w/standard P0 Connector. Ruggedization: Air-Cooled Level 0 CPU: Intel Core i7 (4th Gen Quad Core) System Memory: 8Gbytes of 1066 MHz DDR3 SDRAM with ECC System Flash: 8Gbytes of non-volatile NAND flash. Software Load: Fedora Linux Front via breakout cable; (2) EIA-232 ports, (1) Gigabit Ethernet port, (1) USB 2.0 port, (1) DVI, and (1) Reset button. P2 Connector: (2) EIA-232 ports, (2) EIA-422 ports, (1) AC97 Audio port, (8) GPIO, (1) VGA (1) DVI P0 Connector: (2) Gigabit Ethernet ports, (1) SATA 3.0 port, (2) USB 2.0 Ports X/PMC Sites: (2) 64 bit/133 MHz PMC sites -or- (2) 8xPCIe XMC sites -orcombinations of PMC and XMC. EUS Code No License Required (NO SUBSTITUTIONS ALLOWED). CLIN: 0029 three each CBL-1905-0003 : Breakout cable for SVME-1905/1908 and VPX6-1957-Axx Front Panel I/O. This cable connects to the high-density connector on the SVME-1905 and VPX6-1956-Axx front panel. Provides separate branches: 2 x RS232 ports on DE-9, 1 x GigE port on RJ45 jack, 1 x USB on USB plug, 1 x push button reset switch, and 1 x DVI-D connector. EUS Code No License Required (NO SUBSTITUTIONS ALLOWED). CLIN: 0030 four each XF05D-S17 : Digital I/O XMC Module, fitted with a Xilinx Virtex 5 XC5VSX95T-2I user programmable FPGA with 132 front panel digital I/O signals, two banks of 128 Mbytes (64Mx16) DDR2 SDRAM, two banks of 9Mbytes (4Mx18) QDR2 SRAM. Fitted with optional XMC format P15 connector for PCIe. PMC P14 digital I/O. Air-cooled level 0. (NO SUBSTITUTIONS ALLOWED). XF05D-S17 : Digital I/O XMC Module, fitted with a Xilinx Virtex 5 XC5VSX95T-2I user programmable FPGA with 132 front panel digital I/O signals, two banks of 128 Mbytes (64Mx16) DDR2 SDRAM, two banks of 9Mbytes (4Mx18) QDR2 SRAM. Fitted with optional XMC format P15 connector for PCIe. PMC P14 digital I/O. Air-cooled level 0. (NO SUBSTITUTIONS ALLOWED). CLIN: 0032 seven each SVME-1908-0180 : 6U VME Single Board Computer. VME64x Bus support w/standard P0 Connector. Ruggedization: Air-Cooled Level 0 CPU: Intel Core i7 (4th Gen Quad Core) System Memory: 8Gbytes of 1066 MHz DDR3 SDRAM with ECC System Flash: 8Gbytes of non-volatile NAND flash. Software Load: Fedora Linux Front via breakout cable; (2) EIA-232 ports, (1) Gigabit Ethernet port, (1) USB 2.0 port, (1) DVI, and (1) Reset button. P2 Connector: (2) EIA-232 ports, (2) EIA-422 ports, (1) AC97 Audio port, (8) GPIO, (1) VGA (1) DVI P0 Connector: (2) Gigabit Ethernet ports, (1) SATA 3.0 port, (2) USB 2.0 Ports X/PMC Sites: (2) 64 bit/133 MHz PMC sites -or- (2) 8xPCIe XMC sites -orcombinations of PMC and XMC. EUS Code No License Required (NO SUBSTITUTIONS ALLOWED). CLIN: 0033 seven each XF05D-S17 : Digital I/O XMC Module, fitted with a Xilinx Virtex 5 XC5VSX95T-2I user programmable FPGA with 132 front panel digital I/O signals, two banks of 128 Mbytes (64Mx16) DDR2 SDRAM, two banks of 9Mbytes (4Mx18) QDR2 SRAM. Fitted with optional XMC format P15 connector for PCIe. PMC P14 digital I/O. Air-cooled level 0.(NO SUBSTITUTIONS ALLOWED). CLIN: 0034 four each CBL-1905-0003 : Breakout cable for SVME-1905/1908 and VPX6-1957-Axx Front Panel I/O. This cable connects to the high-density connector on the SVME-1905 and VPX6-1956-Axx front panel. Provides separate branches: 2 x RS232 ports on DE-9, 1 x GigE port on RJ45 jack, 1 x USB on USB plug, 1 x push button reset switch, and 1 x DVI-D connector. EUS Code No License Required (NO SUBSTITUTIONS ALLOWED). CLIN: 0035 one each Base Year MNT-XF05D-XFL : MNT-XF05D-XFL (Linux) is the yearly Software Upgrade Program (SUP) part number associated with FusionXF tools for the XMC-FPGA05D board. Period of Performance (09/01/2013-08/31/2014) (NO SUBSTITUTIONS ALLOWED). CLIN: 0036 one each Base Year MNT-PF05-XF : MNT-PF05-XF is the yearly Software Upgrade Program (SUP) part number associated with the PMC-FPGA05 board. Period of Performance (09/01/2013 - 08/31/2014). (NO SUBSTITUTIONS ALLOWED). CLIN: 0037 one each Base Year MNT-XF05D-XFV : MNT-XF05D-XFV (VxWorks) is the yearly Software Upgrade Program (SUP) part number associated with FusionXF tools for the XMC-FPGA05D board. Period of Performance 09/01/2013 - 08/31/2014. (NO SUBSTITUTIONS ALLOWED). CLIN: 1035 Option Year I MNT-XF05D-XFL : MNT-XF05D-XFL (Linux) is the yearly Software Upgrade Program (SUP) part number associated with FusionXF tools for the XMC-FPGA05D board.Period of Performance (09/01/2014-08/31/2015) (NO SUBSTITUTIONS ALLOWED). CLIN: 1036 one each Option Year I MNT-PF05-XF : MNT-PF05-XF is the yearly Software Upgrade Program (SUP) part number associated with the PMC-FPGA05 board. Period of Performance (09/01/2014 - 08/31/2015). CLIN: 1037 one each Option Year I MNT-XF05D-XFV : MNT-XF05D-XFV (VxWorks) is the yearly Software Upgrade Program (SUP) part number associated with FusionXF tools for the XMC-FPGA05D board. Period of Performance 09/01/2014 - 08/31/2015. (NO SUBSTITUTIONS ALLOWED). CLIN: 2035 one each Option Year II MNT-XF05D-XFL : MNT-XF05D-XFL (Linux) is the yearly Software Upgrade Program (SUP) part number associated with FusionXF tools for the XMC-FPGA05D board. Period of Performance (09/01/2015-08/31/2016) (NO SUBSTITUTIONS ALLOWED). CLIN: 2036 one each Option Year II MNT-PF05-XF : MNT-PF05-XF is the yearly Software Upgrade Program (SUP) part number associated with the PMC-FPGA05 board. Period of Performance (09/01/2015 - 08/31/2016). (NO SUBSTITUTIONS ALLOWED). CLIN: 2037 one each Option Year II MNT-XF05D-XFV : MNT-XF05D-XFV (VxWorks) is the yearly Software Upgrade Program (SUP) part number associated with FusionXF tools for the XMC-FPGA05D board. Period of Performance 09/01/2015 - 08/31/2016. (NO SUBSTITUTIONS ALLOWED). CLIN: 3035 one each Option Year III MNT-XF05D-XFL : MNT-XF05D-XFL (Linux) is the yearly Software Upgrade Program (SUP) part number associated with FusionXF tools for the XMC-FPGA05D board. Period of Performance (09/01/2016-08/31/2017) (NO SUBSTITUTIONS ALLOWED). CLIN: 3036 one each Option Year III MNT-PF05-XF : MNT-PF05-XF is the yearly Software Upgrade Program (SUP) part number associated with the PMC-FPGA05 board. Period of Performance (09/01/2016 - 08/31/2017). (NO SUBSTITUTIONS ALLOWED). CLIN: 3037 one each Option Year III MNT-XF05D-XFV : MNT-XF05D-XFV (VxWorks) is the yearly Software Upgrade Program (SUP) part number associated with FusionXF tools for the XMC-FPGA05D board. Period of Performance 09/01/2016 - 08/31/2017. (NO SUBSTITUTIONS ALLOWED). CLIN: 4035 one each Option Year IV MNT-XF05D-XFL : MNT-XF05D-XFL (Linux) is the yearly Software Upgrade Program (SUP) part number associated with FusionXF tools for the XMC-FPGA05D board. Period of Performance (09/01/2017-08/31/2018) (NO SUBSTITUTIONS ALLOWED). CLIN: 4036 one each Option Year IV MNT-PF05-XF : MNT-PF05-XF is the yearly Software Upgrade Program (SUP) part number associated with the PMC-FPGA05 board. Period of Performance (09/01/2017 - 08/31/2018). (NO SUBSTITUTIONS ALLOWED). CLIN: 4037 one each Option Year IV MNT-XF05D-XFV : MNT-XF05D-XFV (VxWorks) is the yearly Software Upgrade Program (SUP) part number associated with FusionXF tools for the XMC-FPGA05D board. Period of Performance 09/01/2014 - 08/31/2015. (NO SUBSTITUTIONS ALLOWED). The Government does not own the data rights to the data or software code and cannot reproduce the Curtiss Wright software. The Curtiss Wright software is a proprietary product of Curtiss Wright Controls Embedded Computing and no other company has the data rights to sell the KOR Target Generator. Contractor must be an authorized Curtiss Wright Controls Embedded Computing distributor; verification will be made with the company. AUTHORITY: 10 U.S.C. 2304 (C)(1), JUSTIFICATION: SUPPLIES REQUIRED ARE FROM ONLY ONE OR A LIMITED NUMBER OF RESPONSIBLE SOURCE(S) AND NO OTHER TYPE OF SUPPLIES WILL SATISFY AGENCY REQUIREMENTS. THE PROPOSED CONTRACT ACTION IS FOR SUPPLIES AND SERVICES FOR WHICH THE GOVERNMENT INTENDS TO SOLICIT AND NEGOTIATE WITH ONLY ONE, OR A LIMITED NUMBER OF SOURCES UNDER THE AUTHORITY OF FAR 6.301-1. INTERESTED PERSONS MAY IDENTIFY THEIR INTEREST AND CAPABILITY TO RESPOND TO THE REQUIREMENT OR SUBMIT PROPOSALS. THIS NOTICE OF INTENT IS NOT A REQUEST FOR COMPETITIVE PROPOSALS. HOWEVER, ALL PROPOSALS RECEIVED PRIOR TO THE CLOSING DATE ON THE SOLICITATION WILL BE CONSIDERED BY THE GOVERNMENT. A DETEMINATION BY THE GOVERNMENT NOT TO COMPETE THIS PROPOSED CONTRACT BASED UPON RESPONSES TO THIS NOTICE IS SOLEY WITHIN THE DISCRETION OF THE GOVERNMENT. INFORMATION RECEIVED WILL NORMALY BE CONSIDERED SOLEY FOR THE PURPOSE OF DETERMINING WHETHER TO CONDUCT A COMPETITIVE PROCUREMENT. SPECIFICATIONS, PLANS, OR DRAWING RELATING TO THE PROCUREMENT DESCRIBED ARE INCOMPLETE OR NOT AVAILABLE AND CANNOT BE FURNISHED BY THE GOVERNMENT. THE GOVERNMENT DOES NOT OWN THE DATA OR RIGHTS TO THE DATA NEEDED TO PURCHASE THIS ITEM FROM ADDITIONAL SOURCES. The solicitation will be issued on 01 August 2013. The Offer Due Date is 15 August 2013, 10:00 AM MST. The entire solicitation will be made available only on FedBizOpps (FBO) website at: http://www.fbo.gov. Questions regarding this acquisition should be emailed to Dayna Urquhart at contact@example.gov.