High-Performance Embedded Computing (HPEC) Hardware Integration
Contract Overview
Solicitation details, issuing organization, response deadlines, documents, and interested companies for this government contract opportunity.
AI Contract Overview
The U.S. Navy is seeking a subcontractor for the High-Performance Embedded Computing Hardware Integration project, focusing on the design and integration of multi-core processor systems. These systems must be optimized for real-time sensor fusion within constrained naval environments, with a specific emphasis on hardware selection, thermal management, and interface compatibility. This opportunity is a total small business set-aside under the SBIR/STTR mandate for companies with fewer than 500 employees, falling under NAICS code 334111. The solicitation was posted on August 26, 2026, and requires a response by September 9, 2026.
General Info
Agency
NAICS
Place of Performance
Not specifiedSet-Aside
Documents
This scope was carved out of DON26BZ05-NV077.
The full solicitation package (1 document), including the RFP, is on the prime solicitation, not on this scope.
Multi-Core Parallel Processing for Sensor Fusion Architecture
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