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Co-packaging Digital Readout Integrated Circuits and Photonics for Advanced Infrared Imaging

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OSW26BZ05-NV021SBIR / STTR

Contract Overview

Solicitation details, issuing organization, response deadlines, documents, and interested companies for this government contract opportunity.

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Current infrared focal plane arrays capable of generating over 20 Gbps of data at standard video frame rates face significant challenges in cryogenic environments, where traditional electronic output drivers are constrained by power consumption, thermal load, and bandwidth limits, with industry benchmarks stuck at under 3 Gbps per channel and 10 pJ/bit. This power inefficiency directly impacts cryocooler longevity, making a fundamental shift necessary. Photonic integrated circuits offer a promising alternative by potentially improving bandwidth, latency, and energy efficiency by an order of magnitude, but existing approaches relying on chiplets and interposers fail to address the core issue of total system power, as they do not integrate electronics and photonics at the foundational level. The initiative seeks to develop a fully monolithic solution using advanced CMOS/PIC foundry capabilities between 45 and 180 nm, either by co-integrating photonic and electronic layers on a single silicon wafer or by performing foundry-level integration prior to detector hybridization. The goal is to demonstrate high-speed, ultra-low-power optical channels operating reliably under cryogenic conditions, supported by a ROIC capable of sustaining high-throughput data generation. The system must provide configurable electrical and optical output paths for benchmarking and diagnostics, and while radiation hardening for space environments is beneficial, it is not required for the core demonstration.

General Info

Develop monolithic CMOS/PIC chips for cryogenic, ultra-low-power, high-speed optical data transmission over 20 Gbps.

Agency

Department of Defense → Office of the Secretary of DefenseView Agency

NAICS

541715 - Research and Development in the Physical, Engineering, and Life Sciences (except Nanotechnology and Biotechnology)View NAICS

Place of Performance

Not specified

Set-Aside

SBA

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Organization & Contact Information

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AgencyDepartment of Defense → Office of the Secretary of Defense
ContactsNo contacts available
OfficeUS
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Department of Defense → Office of the Secretary of Defense
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Full Description

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State of the art infrared digital focal plane arrays (FPAs) can produce >20 Gbps when operated at standard video framerates and in large formats. Designing output drivers for this bitstream in a cryogenic environment is nontrivial. It requires careful balancing of the electrical, mechanical, and thermal constraints of the readout integrated circuit (ROIC). Industry surveys indicate that the current state of practice is limited to just under 3 Gbps per channel and 10 pJ/bit. In a large format FPA, the power consumption for data transfer becomes significant and acts to shorten cryocooler lifetimes. A paradigm shift is required. Photonic integrated circuits (PICs) are viewed as a potential solution to the ROIC output driver issue. PICs can improve the ROIC bandwidth, latency, and energy consumption by a factor of 10 or more compared to standard electronic IO practices. Unfortunately, all demonstrations to date have utilized mostly off-the-shelf ROICs with PIC chiplets on an interposer. While this reduces the thermal load of the electrical wiring, it does very little to change the overall power consumption. A fully monolithic design is needed. Fortunately, several foundries now offer 45-180 nm CMOS/PIC capabilities. The envisioned effort will demonstrate a tri-service ready capability to either completely integrate electronics and photonics on a single silicon wafer, or perform foundry-level integration of both a photonic and an electronic layer before detector hybridization. The primary objective of this effort is to demonstrate high-speed, ultra-low-power optical channel operations within cryogenic environments. The supporting Readout Integrated Circuit (ROIC) design must support high-throughput data generation. To facilitate benchmarking and diagnostic testing, the system should feature independent and configurable electrical and optical outputs. While specialized design hardening for space and high-radiation environments is advantageous to support long-term survivability, it remains an optional parameter.

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