In-Situ Metrology for Mesa-Wall Integrity in Large Format Small-Pixel Infrared Detector Array Fabrication

The Department of War has a rapidly increasing demand for large-format, small-pixel FPAs to support advanced sensor platforms across Ground, air, maritime, and space domains. To keep pace with ongoing advancements in C-MOS digital-in-pixel Read-Out Integrated Circuits (ROICs) and to produce next-generation infrared sensors, fabrication processes must consistently yield exceptionally high-quality detector arrays. This demand is particularly relevant for high-performance materials such as Antimony (Sb)-based III-V Semiconductor Type-II Superlattice (T2SL) and Mercury Cadmium Telluride (MCT) detectors, which offer enhanced performance in the Mid, Long, and Very Long Wavelength Infrared (MWIR/LWIR/VLWIR) bands. However, as pixel sizes scale down, the devices become highly susceptible to fabrication-induced defects. Avoiding surface damage and unwanted surface currents during array fabrication—specifically during the pixel isolation process—is critical. In smaller pixels, these defects introduce additional noise that severely degrades overall FPA performance and limits mission effectiveness. Proposed solutions must be capable of non-destructively evaluating the integrity of small-pixel mesa-walls by measuring surface current or utilizing other reliable indirect techniques during the pixel isolation process. This screening methodology must be applicable to both Sb-based III-V Semiconductor T2SL and MCT material-based detectors. The specific goals are listed below: • Assessing the surface integrity of the infrared detector arrays sensitive from Short Wave Infrared to Long Wave Infrared bands at suitable cryogenic temperatures. • System should allow measurements of up to 150 mm diameter wafers as well as piece parts. • The proposed technique must be capable of mapping surface currents or utilizing indirect assessment techniques on small pixel geometries without altering the device's electrical or physical characteristics. • The proposers are encouraged to work with prime and/or commercial Sb-based III-V Semiconductor T2SL material and/or MCT detector material growth and processing houses. Furthermore, proposed solutions should prioritize in-situ measurement techniques to facilitate immediate process optimization and the rapid development of corrective solutions, ultimately ensuring the reliable production of advanced, low-noise focal plane arrays (FPAs) for DoW applications.