This Government Contract opportunity from Department Of Defense was posted on August 28, 2026. The submission period has ended. Browse the details below for market research, or find similar active opportunities.

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FPGA and CPLD Source Code Audit and Verification

Closed

Federal

Submission Closed09/09/2026, 05:00:00 PM UTC

Contract Overview

Solicitation details, issuing organization, response deadlines, documents, and interested companies for this government contract opportunity.

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NAICS: 541330

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Managed Lanes Planning and Segment Screening SpecialistThis subcontract opportunity is for a Managed Lanes Planning and Segment Screening Specialist to support prime contractors on Orange County Transportation Authority projects. The selected provider will be responsible for performing technical analysis, inventorying existing and planned managed lane facilities, and developing risk-based screening methodologies to recommend priority segments. Key deliverables include segment inventories, detailed maps created with GIS software, and editable screening workbooks. The project falls under NAICS code 541330 and requires strict compliance with Level 1 HSE Specifications. Interested parties must submit their responses by November 30, 2026, to support the Planning and Analysis division within the state of California.

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Solicitation # C265256

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RFQ: Susquehanna River Road Corridor Safety, Shared-Use Path and Quarry Park Access Improvements

Solicitation # BPM059336

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Engineering and Traffic Surveys Supporting the Town's Speed Limits to Continue Radar Enforcement

Solicitation # 27-004

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Fire Alarm System Design and Engineering ServicesThis subcontract for Fire Alarm System Design and Engineering Services involves providing professional design engineering for fire alarm system replacements at California Military Department facilities in San Luis Obispo. The scope of work includes conducting field verification of room uses, dimensions, and network connections to develop comprehensive design plans and specifications specifically for Buildings 618, 738, 854, and 872. The project requires a highly qualified designer holding a NICET Level IV or V certification to ensure all deliverables meet professional standards. The primary objective is the delivery of approved design plans and specifications. Interested parties should note the response deadline of December 1, 2026, for this effort categorized under NAICS code 541330.

California Military Department

POSTED

about 13 hours ago

DEADLINE

in about 1 month

AI Contract Overview

The FPGA and CPLD Source Code Audit and Verification subcontract, issued by the Department of Defense under agency W6QK Acc-Rsa, involves performing exhaustive audits of source code for prime contractors on Army LRDR projects. The selected provider will analyze VHDL, Verilog, and SystemVerilog code using Questa Inspect to identify hardware defects and ensure strict compliance with Army regulations. This work requires high-performance simulation workstations and deep proficiency in hardware description languages to deliver final audit reports confirming that the hardware is defect-free. The project is based in Redstone Arsenal, Alabama, under NAICS code 541330. The solicitation was posted on August 28, 2026, with a response deadline of September 9, 2026.

General Info

DoD subcontract for FPGA/CPLD source code audits and verification at Redstone Arsenal.

Agency

Department Of Defense → W6QK Acc-Rsa

NAICS

541330 - Engineering Services

Place of Performance

Redstone Arsenal, AL, 35898, USA

Set-Aside

NONE

Documents

This scope was carved out of PANRSA26P0000040377.

The full solicitation package (2 documents), including the RFP, is on the prime solicitation, not on this scope.

View the prime solicitation

Questa Inspect Ap SW Subscription

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Timeline

PhaseClosed

PostedAug 28

subcontract

Response DeadlineSep 9

Deadline has passed

Submission Closed

09/09/2026, 05:00:00 PM UTC

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Organization & Contact Information

AgencyDepartment Of Defense → W6QK Acc-Rsa

ContactsNo contacts available

OfficeN/A

Organization / AgencyDepartment Of Defense → W6QK Acc-Rsa

Office AddressN/A

ContactsNo contact information available

Full Description

Performs exhaustive audits of FPGA and CPLD source code for prime contractors on Army LRDR projects. Analyzes code written in VHDL, Verilog, and SystemVerilog using Questa Inspect to identify hardware defects and verify compliance with Army regulations. Requires proficiency in hardware description languages and high-performance simulation workstations. Delivers audit reports confirming defect-free hardware.

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