FPGA BASED BOARD DESIGN SERVICES FOR MEMORY DEVICE CHARACTERIZATION BOARD

The contract involves FPGA-based board design services focused on memory device characterization, issued by the Department of Commerce's National Institute of Standards and Technology (NIST) in Gaithersburg, Maryland. It is a total small business set-aside under NAICS code 541512, emphasizing the procurement of specialized engineering services. The solicitation, numbered 1333ND25QNB030052, was posted on March 24, 2025, with a response deadline extended to April 4, 2025, at 5 PM EST through Amendment II, which addresses vendor questions. The initial deadline was March 28, 2025, at 11 AM EST, but it has been extended to accommodate additional inquiries, with all other terms remaining unchanged. The contract aims to secure technical expertise for designing FPGA-based hardware, with the performance location in Gaithersburg, MD, and points of contact including Joni L. Laster and Forest Crumpler. The contract's scope is complemented by related documentation, such as a Statement of Work (SOW) for elevator modernization at the NLAE in Ames, IA, which involves code updates, electrical upgrades, and compliance activities. This indicates the agency's broader focus on technical upgrades and modernization projects, requiring contractors to demonstrate experience in elevator modernization and to provide regular progress reports. Overall, the contract emphasizes technical innovation, small business participation, and adherence to detailed project requirements within a defined timeline, with the extended response period allowing vendors additional opportunity to submit their proposals.