CHIPS R&D: High Speed Digitizer
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The CHIPS R&D project for High Speed Digitizers, managed by the Department of Commerce Office of the Director, focuses on advancing RF channel propagation measurements and models for communications circuits. The primary objective is to reduce the development time for these models to better serve industry stakeholders and address specific high-impact needs. A central component of the initiative is the creation of a new generation of channel sounders that integrate FPGA and GPU technology to enable near real-time data processing. To achieve this, the project utilizes an experimental approach involving the production, transmission, and digitization of complex modulated radio-frequency waveforms, which enhances the dynamic range necessary for measuring lossy communications channels. The technical requirement specifically calls for a high-speed digitizer capable of efficient data streaming. This work is slated for performance in Boulder, Colorado, under NAICS code 541715.
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Place of Performance
BOULDER, COSet-Aside
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