CHIPS R&D: High Speed Digitizer

The Department of Commerce is forecasting a project titled CHIPS R&D: High Speed Digitizer to support the development of RF channel propagation measurements and models for communications circuits. The primary objective is to accelerate the delivery of these models to industry stakeholders by enhancing the targeting of specific needs and improving overall impact. A central component of the experimental work involves creating a new generation of channel sounders that integrate FPGA and GPU technology to enable near real-time data processing. To achieve this, the project requires a high-speed digitizer capable of processing complex modulated radio-frequency waveforms to better measure lossy communications channels. This effort will be performed in Boulder and falls under NAICS code 541715. The initiative leverages existing NIST channel sounding methodologies to improve dynamic range and data streaming capabilities in support of the broader CHIPS project.