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CMOS Foundry and Integration Partner

Active
SBIR / STTR

Contract Overview

Solicitation details, issuing organization, response deadlines, documents, and interested companies for this government contract opportunity.

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This subcontract opportunity with the Office of the Secretary of Defense seeks a CMOS Foundry and Integration Partner to support DoD SBIR research projects. The selected partner will be responsible for the fabrication of CMOS read-out integrated circuits and the monolithic integration of graphene sensing layers. Key technical requirements include the execution of photolithography, etching, deposition, and integration onto CMOS wafers, culminating in the delivery of FPA prototypes. The provider must maintain a Class 100 cleanroom equipped with steppers, mask aligners, and e-beam evaporation capabilities while adhering to all semiconductor industry and hazardous material standards. This is a Total Small Business Set-Aside under NAICS code 334413, requiring the partner to have fewer than 500 employees to meet SBIR/STTR mandates. Responses are due by October 7, 2026.

General Info

OSD seeks small business CMOS partner for graphene sensing and FPA prototype fabrication.

Agency

U.S. Department of Defense → Office of the Secretary of DefenseView Agency

NAICS

334413 - Semiconductor and Related Device ManufacturingView NAICS

Place of Performance

Not specified

Set-Aside

SBA

Documents

This scope was carved out of OSW26BZ06-DV027.

The full solicitation package (1 document), including the RFP, is on the prime solicitation, not on this scope.

View the prime solicitation

Monolithic Graphene–CMOS Broadband (UV-LWIR) Focal Plane Arrays for target detection in low-light conditions

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Timeline

Posted

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Response Deadline

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Response Deadline

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Organization & Contact Information

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AgencyU.S. Department of Defense → Office of the Secretary of Defense
ContactsNo contacts available
OfficeN/A
Organization / Agency
U.S. Department of Defense → Office of the Secretary of Defense
View Agency Profile
Office AddressN/A
ContactsNo contact information available

Full Description

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Performs fabrication of CMOS read-out integrated circuits (ROIC) and monolithic integration of graphene sensing layers for prime contractors on DoD SBIR research projects. Executes photolithography, etching, deposition, and monolithic integration onto CMOS wafers. Requires Class 100 cleanroom, steppers, mask aligners, and e-beam evaporation. Adheres to semiconductor industry and hazardous material standards. Delivers FPA prototypes.

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ACTIVE DEVICES DIVISION

POSTED

about 9 hours ago

DEADLINE

in 12 days
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