Custom HDL Plugin Development for Signal Processing
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The contract requires the development of custom HDL plugins derived from Xilinx reference designs to implement ADC and DAC passthrough functionality, enabling seamless real-time signal processing workflows. The work must align with established hardware architectures to ensure compatibility and performance in high-speed data acquisition and processing environments, with a focus on low-latency, deterministic operation critical for defense and research applications. The deliverables will include fully verified HDL code, integration support, and documentation to facilitate deployment within existing systems. This subcontract is issued by the Naval Research Laboratory under the Department of Defense, with performance required at a location in Washington, D.C., ZIP code 20036. The solicitation, classified under NAICS code 541715 for scientific research and development services, is open for responses until August 11, 2026, with submissions due by 8:00 PM Eastern Time. The project demands expertise in FPGA design, digital signal processing, and adherence to Xilinx toolchains, targeting advanced signal analysis capabilities for naval and defense systems.
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Washington, DC, 20036, USASet-Aside
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