Fabrication System for Atom-Scale Quantum Devices

*Please note the ISC Website will be available on February 15, 2023 at 14:00 EDTThis Challenge Notice is issued under the Innovative Solutions Canada Program (ISC) Call for Proposals 003 (EN578-20ISC3). For general ISC information, Bidders can visit the ISC website.Please refer to the Solicitation Documents which contain the process for submitting a proposal.Steps to apply:Step 1: read this challengeStep 2: read the Call for ProposalsStep 3: propose your solution hereChallenge title: Fabrication System for Atom-scale Quantum DevicesChallenge sponsor: Innovation, Science and Economic Development (ISED)Funding Mechanism: ContractMAXIMUM CONTRACT VALUE:Multiple contracts could result from this Challenge.Phase 1:The maximum funding available for any Phase 1 contract resulting from this Challenge is : $150,000.00 CAD excluding applicable taxes, shipping, travel and living expenses, as required.The maximum duration for any Phase 1 contract resulting from this Challenge is up to 6 months (excluding submission of the final report).Estimated number of Phase 1 contracts: TBDPhase 2:Note: Only eligible businesses that have successfully completed Phase 1 will be invited to submit a proposal for Phase 2.The maximum funding available for any Phase 2 contract resulting from this Challenge is : $1,000,000.00 CAD excluding applicable taxes, shipping, travel and living expenses, as required.The maximum duration for any Phase 2 contract resulting from this Challenge is up to 24 months (excluding submission of the final report).Estimated number of Phase 2 contracts: TBDThis disclosure is made in good faith and does not commit Canada to award any contract for the total approximate funding. Final decisions on the number of Phase 1 and Phase 2 awards will be made by Canada on the basis of factors such as evaluation results, departmental priorities and availability of funds. Canada reserves the right to make partial awards and to negotiate project scope changes.Note: Selected companies are eligible to receive one contract per phase per challenge.TravelNo traveling will be required in Phase 1.Challenge Statement SummaryInnovation, Science and Economic Development (ISED) is seeking innovations that can advance the creation of a new generation of atom-scale quantum circuits that can help improve departments’ existing quantum capacities. Challenge StatementQuantum technologies are at the cutting edge of science and innovation, both in Canada and worldwide. There is development and testing on atom-scale circuits for quantum devices that relies on the ability to create single atom quantum dots and spin centers accurately at specific atomic sites on a silicon surface. These circuits will have applications in ultra-low power logic circuits, metrological standards and quantum sensors. In order for the circuits to be printed at the atomic level with precision, accuracy and speed, a new generation of atom-scale fabrication system is required. The lack of appropriate fabrication instrumentation is currently limiting the rate of development of atomic lithography and science and technologies at the atom scale.This challenge aims to create an instrument for atomically precise manufacturing, consisting of a hybrid fabrication tool and microscope developed around a linear, open loop scanner, capable of building quantum circuit components with minimal error and without the strict limitations of currently available equipment. This instrument, together with other capabilities in the system for testing and packaging, will also allow for atomic circuit prototypes to be shipped to other partners. Desired outcomes and considerationsEssential (mandatory) OutcomesThe proposed solution must:Demonstrate atom resolving images of silicon (100) in both Scanning Tunneling Microscopy (STM) and Qplus Atomic Force Microscopy (AFM).Provide a linear scanner operating in open loop.Provide high bandwidth coax cabling to probe and sample (GHz range).Operate at ~4 K temperature for sample and scanner.Demonstrate a stable, measurable tunnel current at least as low as 1 pA.Be prepared as an ultrahigh vacuum tool.Have separate vacuum systems, all combined: 1) the main tool for atomic fabrication,2) a location for silicon preparation, 3) a location for tip fabrication.Achieve ultrahigh vacuum ~ 1e-10Torr for all vacuum systems.Additional OutcomesThe proposed solution should:Have no measurable creep and hysteresis under normal scanning speeds (~100 nm/s) and over the full range of motion.Provide creep-and hysteresis-free motion of the scanner from roomtemperature to 4 K.The scanner should be capable of at least 0.1 Å lateral resolution and 0.01 Å vertical resolution.Maintain constant height imaging with little thermal drift (<0.5 nm/hr).Machine with 500 MHz capable wiring to sample and tip.Machine with at least 4 additional sample wires.Achieve 2 µm XY scan range for fine scanner.Achieve 200 nm Z range for the fine scanner.Achieve XYZ coarse motor with ~5-10 mm motion for each axis.Achieve a hold time of greater than 60 hours or more.&nbsp;Operate at Ultimate pressures below 10e-10 Torr.Testing station capable of connecting to the 4 sample contacts.Encapsulation station in UHV.Have vacuum system location for sample testing and encapsulation/packaging after fabrication.Background and ContextAtom scale lithography is highly compromised with today’s instruments. This is because the scanners used to guide the lithography probe are made from piezoelectric material that have inherent nonlinearities. This means that for an applied voltage, the exact location of the probe will have errors on the scale of the lithography desired. These errors are manifested through hysteretic motion, where scanning left/right or up/down will not trace the same profile or through creep, where the scanner will continue to move after the voltage sweep has been stopped. Both of these errors create challenges in addressing exact positions for atom scale lithography. Closed loop scanners have been developed to try to solve these issues but also have limitations in precision and speed not found in open loop scanners. Some scanning errors can be partially alleviated in some instances by moving the scanner in non optimal ways; such as slower than desired and over very narrow ranges. Despite this, lithographic errors do occur while preparing atom scale circuits, requiring time consuming error correction methods. As well, slow indexing procedures and registration of the scanner are also continually required in order to know the probe’s position and minimize positional errors during printing, especially of complex patterns over large areas. These issues described cause many challenges for printing complicated atom scale patterns for testing and development, that could be solved by utilizing a better and linear scanner. Linear piezo materials do exist, however, the functional scanning range is severely limited and does not allow for complex circuits to be created because of the limiting scanning range. Increasing the scanning range while maintaining the ideal creep and hysteretic properties of the material would solve this issue and greatly open the door to improved atom scale lithography.Integration of the linear scanner within complete manufacturing and testing system will further propel atom scale development at NRC. Other opportunities for linear and precise nanopositioning are also arising in other high technology systems including scanning electron microscopes, transmission electron microscopes, electron beam lithography and many other nano- and micro-fabrication instruments that rely on piezo motion for positioning. These capabilities will draw new partners and opportunities to NRC. The timing to receive the tool aligns with current Quantum Sensing Program projects as those projects transition to higher TRL levels with requirements of improved fabrication, testing, and demonstrations. ENQUIRIESAll enquiries must be submitted in writing to TPSGC.SIC-ISC.PWGSC@tpsgc-pwgsc.gc.ca no later than ten calendar days before the Challenge Notice closing date. Enquiries received after that time may not be answered.How to Prepare a Bid