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Semiconductor Process Flow & Process Design Kit (PDK) Development

Open
Federal

Contract Overview

Solicitation details, issuing organization, response deadlines, documents, and interested companies for this government contract opportunity.

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The National Science Foundation's Directorate For Technology, Innovation, and Partnerships is seeking a subcontractor for the Semiconductor Process Flow and Process Design Kit (PDK) Development project. The primary objective is to create reproducible process steps and validated PDKs for Low-D semiconductor devices to support prime contractors on NSF ELEGANT projects. This work involves establishing documented process flows and utilizing EDA tools and semiconductor fabrication equipment in collaboration with industry partners. The successful contractor must deliver validated PDKs and comprehensive process flow documentation while ensuring strict compliance with CHIPS Act restrictions regarding foreign entities of concern. This opportunity falls under NAICS code 541715, with a response deadline of December 18, 2026.

General Info

NSF seeks subcontractor for Low-D semiconductor process flow and PDK development by 2026.

Agency

National Science Foundation → Directorate For Technology, Innovation, & Partnerships

NAICS

541715 - Research and Development in the Physical, Engineering, and Life Sciences (except Nanotechnology and Biotechnology)

Place of Performance

1180, VA, USA

Set-Aside

NONE

Documents

This scope was carved out of NSF-OTASO-FY26-ELEGANT.

The full solicitation package (2 documents), including the RFP, is on the prime solicitation, not on this scope.

View the prime solicitation

NSF Ecosystem for Low-dimensional Electronics: Growth, Assembly, Nanoelectronics, and Translation (NSF ELEGANT)

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Organization & Contact Information

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AgencyNational Science Foundation → Directorate For Technology, Innovation, & Partnerships
ContactsNo contacts available
OfficeN/A
Organization / AgencyNational Science Foundation → Directorate For Technology, Innovation, & Partnerships
Office AddressN/A
ContactsNo contact information available

Full Description

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Develops reproducible process steps and Process Design Kits (PDKs) for prime contractors on NSF ELEGANT projects. Establishes documented process flows and validates PDKs for Low-D semiconductor devices with industry partners using EDA tools and semiconductor fabrication equipment. Must comply with CHIPS Act foreign entity of concern restrictions. Delivers validated PDKs and documented process flow.

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